Semiconductor chips have become progressively more complex, driven in large part by the need for increasing processing power in a smaller chip size for compact or portable electronic devices such as cell phones, smart phones, personal media systems, or ultraportable computers.
The semiconductor chips are packaged in integrated circuit packaging systems. Most of the integrated circuit packaging systems are made by placing the semiconductor chips on a lead frame; wire bonding the chips to the metal leads of that lead frame; and then protecting the chips with encapsulation.
Leadframe technology is widely used in many package varieties that use metal leads extending outside the package housing. Conventional integrated circuit packaging manufacture uses costly materials for leadframe, such as core and pre-preg, and build-up processes, which are costly and have long cycle times and involves more process controls.
Thus, a need still remains for a precise and cost-effective way of creating leadframes. In view of the shrinking sizes of electronic components, it is increasingly critical that answers be found to these problems. In view of the ever-increasing commercial competitive pressures, along with growing consumer expectations and the diminishing opportunities for meaningful product differentiation in the marketplace, it is critical that answers be found for these problems. Additionally, the need to reduce costs, improve efficiencies and performance, and meet competitive pressures adds an even greater urgency to the critical necessity for finding answers to these problems.
Solutions to these problems have been long sought but prior developments have not taught or suggested any solutions and, thus, solutions to these problems have long eluded those skilled in the art.